Back-gated InGaAs-on-insulator lateral N+NN+ MOSFET: Fabrication and typical conduction mechanisms

H.J. Park (1) , L. Pirro (1) , L. Czornomaz (2) , I. Ionica (1) , M. Bawedin (1) , V. Djara (2) , V. Deshpande (2) , S. Cristoloveanu (1)

1 IMEP-LAHC - Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation
2 IBM Research Laboratory [Zurich]

Back-gated InGaAs-on-insulator lateral N+NN+ MOSFETs are successfully fabricated by direct wafer bonding and selective epitaxial regrowth. These devices were characterized using a revisited pseudo-MOSFET configuration. Two different transport mechanisms are evidenced: volume conduction in the undepleted region of the film and surface conduction at the interface between InGaAs and buried insulator. We propose extraction techniques for the volume mobility and interface mobility. The impact of film thickness, channel width, and length is evaluated. Additional measurements reveal the variation of the transistor parameters at low temperature and under externally applied uniaxial tensile strain. Previous article in issue

Mots clés: III–V; InGaAs; SOI pseudo-MOSFET; MOSFET; Wafer bonding; carrier mobility; Strain Selective regrowth

Domaines: Micro et nanotechnologies/Microélectronique

H.J. Park, L. Pirro, L. Czornomaz, I. Ionica, M. Bawedin, et al.. Back-gated InGaAs-on-insulator lateral N+NN+ MOSFET: Fabrication and typical conduction mechanisms. Solid-State Electronics, 2017, 128, pp.80-86. ⟨10.1016/j.sse.2016.10.019⟩. ⟨hal-02003226⟩