Work-in-Progress: Extending Buffer-Aware Worst-Case Timing Analysis of Wormhole NoCs

Frédéric Giroudot (1) , Ahlem Mifdaoui (1)

1 DISC - Département d'Ingénierie des Systèmes Complexes

Worst-case timing analysis of Networks-on-Chip (NoCs) is a crucial aspect to design safe real-time systems based on manycore architectures. In this paper, we present some potential extensions of our previously-published buffer-aware worst-case timing analysis approach to cope with bursty traffic such as real-time audio and video streams. A first promising lead is to improve the algorithm analyzing backpressure patterns to capture consecutive-packet queueing effect while keeping the information about the dependencies between flows. Furthermore, the improved algorithm may also decrease the inherent complexity of computing the indirect blocking latency due to backpressure.

Mots clés: Networks-on-chip; Network Calculus; Real time; Worst-case timing analysis; Wormhole routing

Domaines: Réseaux et télécommunications [cs.NI]

Frédéric Giroudot, Ahlem Mifdaoui. Work-in-Progress: Extending Buffer-Aware Worst-Case Timing Analysis of Wormhole NoCs. 39th IEEE Real-Time Systems Symposium (RTSS 2018), Dec 2018, Nashville, United States. pp.169-172. ⟨hal-01982443⟩