Dynamic Slowdown and Partial Reconfiguration to Optimize Energy in FPGA Based Auto-adaptive SoPC

Xun Zhang (1) , Hassan Rabah (2) , Serge Weber (2)

1 ISEP - Institut Supérieur d'Electronique de Paris
2 LIEN - Laboratoire d'Instrumentation Electronique de Nancy

Domaines: Optique / photonique; Electronique; Traitement du signal et de l'image [eess.SP]

Xun Zhang, Hassan Rabah, Serge Weber. Dynamic Slowdown and Partial Reconfiguration to Optimize Energy in FPGA Based Auto-adaptive SoPC. 4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008), Jan 2008, Hong Kong, France. ⟨10.1109/delta.2008.122⟩. ⟨hal-01874048⟩