Practical Transient System-level ESD Modeling - Environment Contribution

Marise Bafleur (1) , Rémi Bèges (1) , Fabrice Caignet (1) , André Durier (2) , Christian Marot (3) , Nicolas Nolhier (1)

1 LAAS-ESE - Équipe Énergie et Systèmes Embarqués
2 IRT Saint Exupéry - Institut de Recherche Technologique
3 Airbus Groups Innovations

A methodology for building a transient model of an analog system is detailed. It does not require proprietary knowledge for integrated circuits (IC). At IC level, it combines a protection structure characterization and behavioral modeling with a core description. A specific test board is developed with a smart voltage regulator to validate the methodology. A system model is assembled to perform powered-on transient ESD simulations. A soft-failure criterion is chosen and the prediction of trends in soft-failure generation is carried out. The strong influence of the electrical environment is demonstrated through this case study.

Domaines: Micro et nanotechnologies/Microélectronique

Marise Bafleur, Rémi Bèges, Fabrice Caignet, André Durier, Christian Marot, et al.. Practical Transient System-level ESD Modeling - Environment Contribution. Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), Sep 2014, Tucson, AZ, United States. 10p. ⟨hal-01843080⟩