F. Conti, A. Marongiu, and L. Benini, Synthesis-friendly techniques for tightly-coupled integration of hardware accelerators into shared-memory multi-core clusters, 2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pp.1-5, 2013.
DOI : 10.1109/CODES-ISSS.2013.6658992

S. Das, K. J. Martin, P. Coussy, D. Rossi, and L. Benini, Efficient mapping of CDFG onto coarse-grained reconfigurable array architectures, 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), pp.127-132, 2017.
DOI : 10.1109/ASPDAC.2017.7858308
URL : https://hal.archives-ouvertes.fr/hal-01452277

S. Das, D. Rossi, K. J. Martin, P. Coussy, and L. Benini, A 142MOPS/mW integrated programmable array accelerator for smart visual processing, 2017 IEEE International Symposium on Circuits and Systems (ISCAS), pp.1-4, 2017.
DOI : 10.1109/ISCAS.2017.8050238
URL : https://hal.archives-ouvertes.fr/hal-01534574

B. D. Sutter, P. Raghavan, and A. Lambrechts, Coarse-grained reconfigurable array architectures, Handbook of Signal Processing Systems, pp.449-484, 2010.

L. Duch, S. Basu, R. Braojos, G. Ansaloni, L. Pozzi et al., HEAL-WEAR: An Ultra-Low Power Heterogeneous System for Bio-Signal Analysis, IEEE Transactions on Circuits and Systems I: Regular Papers, 2017.
DOI : 10.1109/TCSI.2017.2701499
URL : https://infoscience.epfl.ch/record/227874/files/tcasI16-cgra.pdf

M. Gautschi, P. D. Schiavone, A. Traber, I. Loi, A. Pullini et al., Near-threshold riscv core with dsp extensions for scalable iot endpoint devices, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp.1-14, 2017.
DOI : 10.1109/tvlsi.2017.2654506
URL : http://arxiv.org/pdf/1608.08376

I. Loi, A. Capotondi, D. Rossi, A. Marongiu, and L. Benini, The quest for energy-efficient i$ design in ultra-low-power clustered manycores, IEEE Transactions on Multi-Scale Computing Systems, issue.99, pp.1-1, 2017.

A. Rahimi, I. Loi, M. R. Kakoee, and L. Benini, A fully-synthesizable single-cycle interconnection network for Shared-L1 processor clusters, 2011 Design, Automation & Test in Europe, pp.1-6, 2011.
DOI : 10.1109/DATE.2011.5763085

D. Rossi, I. Loi, G. Haugou, and L. Benini, Ultra-low-latency lightweight DMA for tightly coupled multi-core clusters, Proceedings of the 11th ACM Conference on Computing Frontiers, CF '14, p.15, 2014.
DOI : 10.1145/2597917.2597922

D. Rossi, A. Pullini, I. Loi, M. Gautschi, F. K. Gürkaynak et al., Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster, IEEE Micro, vol.37, issue.5, pp.20-31, 2017.
DOI : 10.1109/MM.2017.3711645

M. B. Taylor, Is dark silicon useful? harnessing the four horsemen of the coming dark silicon apocalypse, Design Automation Conference (DAC), 2012 49th ACM, pp.1131-1136, 2012.