Impact of a HTO/Al$_2$O$_3$ bi-layer blocking oxide in nitride-trap non-volatile memories

Marc Bocquet (1, 2) , G. Molas (1) , L. Perniola (1) , X. Garros (1) , J. Buckley (1) , M. Gély (1) , J.P. Colonna (1) , H. Grampeix (1) , F. Martin (1) , V. Vidal (1) , A. Toffoli (1) , S. Deleonibus (1) , G. Ghibaudo (2) , G. Pananakakis (2) , B. de Salvo (1)

1 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information
2 IMEP-LAHC - Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation

In this work, we present an experimental and theoretical study of nitride-trap devices with a HTO/Al$_2$O$_3$ bi-layer blocking oxide. Such (Silicon/Alumina/HTO/Nitride/Oxide/Silicon) SAONOS devices are compared with standard (Silicon/HTO/Nitride/Oxide/Silicon) SONOS and (Silicon/Alumina/Nitride/Oxide/Silicon) SANOS memories. The role of the different layers (blocking oxide and control gate) is deeply analyzed, focusing on their impact on memory performance and reliability. Then, a semi-analytical model is developed , which provides a good understanding of the physical mechanisms at the origin of program/erase characteristics.

Mots clés: Blocking oxide; SANOS; SONOS; SAONOS; charge trapping memories

Domaines: Micro et nanotechnologies/Microélectronique

Marc Bocquet, G. Molas, L. Perniola, X. Garros, J. Buckley, et al.. Impact of a HTO/Al$_2$O$_3$ bi-layer blocking oxide in nitride-trap non-volatile memories. Solid-State Electronics, 2009, 53, pp.786 - 791. ⟨10.1016/j.sse.2009.03.018⟩. ⟨hal-01737746⟩