Detection of resistive open and short defects in FDSOI under delay-based test: Optimal VDD and body biasing conditions

Amit Karel 1 Florence Azaïs 1 Mariane Comte 1 Jean-Marc Galliere 1 Michel Renovell 1 Keshav Singh 1
1 TEST - TEST
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : This paper presents a comprehensive study towards the identification and quantification of the detectability improvement of resistive open and short defects, brought by specific supply voltage and body biasing conditions applied during manufacturing test. The study is conducted using a didactic circuit implemented in 28nm UTBB FDSOI-RVT (Ultra-Thin Body and Buried oxide Fully Depleted Silicon-On-Insulator, Regular VT) technology in the context of delay-based test. Electrical simulation results are analyzed in order to both highlight the optimal test conditions overall and evaluate the individual improvement in defect detection brought by each factor (supply voltage and body biasing conditions), for different resistive defect types.
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https://hal.archives-ouvertes.fr/hal-01709615
Contributor : Jean-Marc Galliere <>
Submitted on : Thursday, February 15, 2018 - 10:36:46 AM
Last modification on : Monday, July 22, 2019 - 9:55:08 AM

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Amit Karel, Florence Azaïs, Mariane Comte, Jean-Marc Galliere, Michel Renovell, et al.. Detection of resistive open and short defects in FDSOI under delay-based test: Optimal VDD and body biasing conditions. ETS: European Test Symposium, May 2017, Limassol, Cyprus. ⟨10.1109/ETS.2017.7968208⟩. ⟨hal-01709615⟩

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