Heterogeneous computing system platform for high-performance pattern recognition applications

Abstract : We present a system architecture made of a motherboard with a Xilinx Zynq System on Chip (SoC) and a mezzanine board equipped with an Associative Memory chip (AM). The proposed architecture is designed to serve as an accelerator of general purpose algorithms based on pipeline processing and pattern recognition. We present the open source software and firmware developed to fully exploit the available communication channels between the ARM CPU and the FPGA using Direct Memory Access (DMA) technique and the AM using Multi-Gigabit Transceivers (MGT). We report the measured performances and discuss potential applications and future developments. The proposed architecture is compact, portable and provide a large communication bandwidth between components.
Type de document :
Communication dans un congrès
6th International Conference on Modern Circuits and Systems Technologies, May 2017, Thessaloniki, Greece. pp.7937638, 2017, 〈10.1109/MOCAST.2017.7937638〉
Liste complète des métadonnées

https://hal.archives-ouvertes.fr/hal-01669640
Contributeur : Inspire Hep <>
Soumis le : mercredi 20 décembre 2017 - 23:49:35
Dernière modification le : mardi 18 septembre 2018 - 21:46:28

Identifiants

Collections

Citation

M.Ali Mirzaei, Vincent Voisin, Alberto Annovi, Guillaume Baulieu, Matteo Beretta, et al.. Heterogeneous computing system platform for high-performance pattern recognition applications. 6th International Conference on Modern Circuits and Systems Technologies, May 2017, Thessaloniki, Greece. pp.7937638, 2017, 〈10.1109/MOCAST.2017.7937638〉. 〈hal-01669640〉

Partager

Métriques

Consultations de la notice

62