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2.5D integration of point-of-load DC/DC converter for minimized interconnection parasitics

Abstract : The paper presents the design and measurements for very high frequency, low power, inductive DC-DC converters (100 MHz, 3.3V input voltage, 350mW output power). A 3-stage cascode power stage in 40nm CMOS technology is demonstrated at high switching frequency but satisfying efficiency. Particularly it is shown that 2.5D heterogeneous integration brings significant benefits to cut losses thanks to a capacitive interposer to reduce the impact of parasitic components. An efficiency of 90% is measured while converting from 3.3V to 2.4V and supplying 150 mA, showing a +8% efficiency improvement compared to a converter with a standard power stage. Integration of magnetic devices remain unfortunately a barrier to higher power density even in the case of a multi-phase architecture and high switching frequency: two degrees of freedom supposed to reduce the required value in magnetic components.
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https://hal.archives-ouvertes.fr/hal-01648366
Contributor : Publications Ampère <>
Submitted on : Saturday, November 25, 2017 - 4:09:07 PM
Last modification on : Monday, September 13, 2021 - 2:44:04 PM

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Christian Martin, Bruno Allard, Florian Neveu. 2.5D integration of point-of-load DC/DC converter for minimized interconnection parasitics. ESARS-ITEC, Nov 2016, Toulouse, France. ⟨10.1109/ESARS-ITEC.2016.7841407⟩. ⟨hal-01648366⟩

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