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Influence of PE-ALD of GaP on the Silicon Wafers Quality

Abstract : An attractive method of low-temperature plasma-enhanced atomic layer 7 deposition (PE-ALD) of GaP on silicon wafer was recently proposed. In the 8 present paper, the influence of the growth process on the quality of silicon 9 wafers is explored by space charge capacitance techniques, C-V profiling and 10 deep level transient spectroscopy (DLTS). No DLTS peak is observed for 11 PE-ALD GaP deposited onto n-type wafer, meaning that the defect concentra-12 tion is very low (less than 1 Â 10 12 cm À 3) and that the growth process does 13 not affect the properties of the n-Si wafer. For boron-doped p-type silicon, 14 C-V profiling shows that there is no deactivation of boron doping after the 15 PE-ALD process, as could have been expected from the presence of hydrogen 16 in the plasma. Measurements on the reference Schottky diodes formed on 17 the p-type Si wafer reveal the presence of the well-known Fe interstitial 18 defects at the position E V þ 0.38 eV with a concentration of 3 Â 10 13 cm À 3. 19 PE-ALD of GaP leads to a modification of the response of this defect and to 20 the appearance of another response in the low temperature range, possibly 21 related to changes in the Fe interstitial defect environment or configuration. 22 However, deep-levels were not detected in p-Si after PE-ALD, meaning that 23 the quality of p-Si does not degrade. 24 1. Introduction 25 High-efficiency and low-cost of solar cells are the driving forces 26 for the success of photovoltaics in terrestrial applications. The 27 highest efficiencies are obtained for multi-junction solar cells 28 based on III-V compounds (GaAs, GaInP, GaNAs, etc.). In 2015 29 multi-junction solar cell based on III-V semiconductors have 1 achieved record efficiency of 46% (concen-2 trator). [1] For space applications, where the 3 key factors are the efficiency and resistance 4 to radiation triple-junction solar cells based 5 on the GaInP (1.85 eV)/GaAs (1.42 eV)/Ge 6 (0.7 eV) system are industrially used. 7 However, cost of wafers (Ge, GaAs, InP, 8 etc.) and expensive growth methods 9 (molecular-beam (MBE) and vapor-phase 10 epitaxy (VPE)) are major drawbacks to the 11 extension of low-cost solar cells based on 12 III-V compounds to terrestrial usage. On 13 the other hand, silicon industry is much 14 more developed than that of III-V semi-15 conductors and silicon is one of the most 16 abundant element in the Earth, so the cost 17 of growth and processing for silicon solar 18 cells is much lower. Thus, majority of 19 terrestrial solar cells (90%) are fabricated 20 from silicon. However, record efficiency 21 solar cell based on silicon is slightly above 22 26% [2] and it almost reaches the theoretical 23 limit for single-junction silicon solar cell. 24 PV requires new approaches for high-25 efficiency and low-cost solar cells, which 26 can combine the advantages of III-V multi-27 junction and silicon solar cells. Therefore, fabrication of multi-28 junction solar cells with active layers of III-V compounds on 29 silicon wafers is a very promising approach for the photovoltaic 30 industry. Growth of III-V semiconductors on silicon wafers is a 31 real challenge for scientists, because such a technology can open 32 the way to the fabrication of optoelectronic integrated circuits. 33 Gallium phosphide is one of the most perspective candidates for 34 fabrication of multi-junction solar cells on silicon wafers. Firstly, 35 lattice mismatch between Si and GaP is only 0.4% so GaP can be 36 grown on silicon for the fabrication of the bottom subcell based 37 on GaP/Si heterojunction by different epitaxial methods (MBE 38 and VPE). [3,4] Further, novel materials (In)GaP(NAs) with small 39 nitrogen content (called dilute nitrides) can be lattice-matched to 40 GaP. These materials can be grown as active layers for top 41 subcells with a wide range of bandgap values, 1.5-2.1 eV. [5] 42 Previous efforts on the growth of dilute nitrides GaPNAs on Si 43 wafers have not allowed one to reach high efficiencies due to the 44 low quality of layers in solar cells. [6] Temperature of 800-900 C 45 required during growth process is a possible reason for the low 46 performance of solar cells for MBE and VPE epitaxial methods.
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Artem Baranov, Alexander S. Gudovskikh, Dmitriy A. Kudryashov, Ivan A. Morozov, Alexey M. Mozharov, et al.. Influence of PE-ALD of GaP on the Silicon Wafers Quality. physica status solidi (a), Wiley, 2017, ⟨10.1002/pssa.201700685⟩. ⟨hal-01629362⟩



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