A Watt-Level 4G LTE CMOS Reconfigurable Power Amplifier with Efficiency Enhancement in Power Back-Off

Quang Giap Luong (1) , Jean Marie Pham (2) , Pierre Medrel (3) , Eric Kerherve (2)

1 IMS Bordeaux Laboratory, 33400 Talence, France
2 IMS - Laboratoire de l'intégration, du matériau au système
3 XLIM-SRF - Systèmes RF

This paper presents a reconfigurable two-stage power amplifier (PA) for use in 4G LTE unmanned aerial vehicle (UAV) applications. The PA using the TSMC bulk 65-nm CMOS process exhibits a saturated output power of 29.8 dBm, a power gain of 35.6 dB, a maximum power added efficiency (PAE) of 27.2 % at 2.5GHz and maintains PAE over 10 % in the output power’s 8 dB back-off zone as required by LTE’s PAPR specifications. The proposed reconfigurable PA architecture, which includes four sub PA cells with the power cell switching (PCS) technique, allows the high level of efficiency in back-off of output power. The four sub-PA cells are composed of three differential cascode stages, supplied by 3.3 V and implemented with the segmented bias (SB) technique to maintain the high level of PAE, reduce the DC power consumption and reconfigure the output impedance.

Mots clés: CMOS; Power Amplifier; transformer; segmented bias; differential; neutralization technique

Domaines: Electronique

Quang Giap Luong, Jean Marie Pham, Pierre Medrel, Eric Kerherve. A Watt-Level 4G LTE CMOS Reconfigurable Power Amplifier with Efficiency Enhancement in Power Back-Off. The Tenth International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS), Sep 2017, Rome, Italy. ⟨hal-01618231⟩