YAGLE, a Second generation Functional Abstractor for CMOS VLSI Circuits

Anthony Lester (1) , Pirouz Bazargan Sabet (1) , Alain Greiner (1)

1 ASIM - Architecture des Systèmes intégrés et Micro électronique

This paper presents a new functional abstraction tool for CMOS VLSI. The tool uses a procedure called circuit disassembly in order to extract an oriented gate netlist from a transistor netlist. Logic equations are then generated for these extracted gates in order to produce a VHDL data-flow description for a circuit. This tool combines an advanced functional analysis technique with subgraph isomorphism algorithms in order to handle the widest possible number of circuit styles with a minimum of user intervention.

Domaines: Informatique [cs]

Anthony Lester, Pirouz Bazargan Sabet, Alain Greiner. YAGLE, a Second generation Functional Abstractor for CMOS VLSI Circuits. 10th International Conference on Microelectronics (ICM'98), Dec 1998, Monastir, Tunisia. pp.265-268, ⟨10.1109/ICM.1998.825615⟩. ⟨hal-01618044⟩