J. Abella, D. Hardy, I. Puaut, E. Quiñones, and F. J. Cazorla, On the Comparison of Deterministic and Probabilistic WCET Estimation Techniques, 2014 26th Euromicro Conference on Real-Time Systems, pp.266-275, 2014.
DOI : 10.1109/ECRTS.2014.16
URL : https://hal.archives-ouvertes.fr/hal-01086875

A. Bouakaz, I. Puaut, and E. Rohou, Predictable Binary Code Cache: A First Step towards Reconciling Predictability and Just-in-Time Compilation, 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium, pp.11-14, 2011.
DOI : 10.1109/RTAS.2011.29
URL : https://hal.archives-ouvertes.fr/inria-00589690

A. Colin and I. Puaut, Worst case execution time analysis for a processor withbranch prediction. Real-Time Syst, pp.249-274, 2000.

R. Cousot and . Cousot, Abstract interpretation: a unified lattice model for static analysis of programs by construction or approximation of fixpoints Using bypass to tighten WCET estimates for multi-core processors with shared instruction caches, Conference Record of the Fourth Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages Proceedings of the 30th IEEE Real-Time Systems Symposium, RTSS 2009, pp.238-252, 1977.

D. Hardy and I. Puaut, Predictable Code and Data Paging for Real Time Systems, 2008 Euromicro Conference on Real-Time Systems, pp.266-275, 2008.
DOI : 10.1109/ECRTS.2008.16
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.513.8233

D. Hardy and I. Puaut, WCET analysis of multi-level non-inclusive setassociative instruction caches, Proceedings of the 29th IEEE Real-Time Systems Symposium , RTSS 2008, pp.456-466, 2008.
DOI : 10.1109/rtss.2008.10
URL : http://www.irisa.fr/caps/people/hardy/papers/rtss08.pdf

D. Hardy and I. Puaut, WCET analysis of instruction cache hierarchies, Journal of Systems Architecture, vol.57, issue.7, pp.677-694, 2011.
DOI : 10.1016/j.sysarc.2010.08.007
URL : https://hal.archives-ouvertes.fr/hal-00639454

D. Hardy and I. Puaut, Static probabilistic worst case execution time estimation for architectures with faulty instruction caches. Real-Time Systems, pp.128-152, 2015.
DOI : 10.1145/2516821.2516842
URL : https://hal.archives-ouvertes.fr/hal-00862604

K. Huynh, L. Ju, and A. Roychoudhury, Scope-Aware Data Cache Analysis for WCET Estimation, 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium, pp.203-212, 2011.
DOI : 10.1109/RTAS.2011.27
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B. Lesage, D. Hardy, and I. Puaut, WCET analysis of multi-level setassociative data caches, 9th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis Schloss Dagstuhl -Leibniz- Zentrum fuer Informatik, 2009.
URL : https://hal.archives-ouvertes.fr/inria-00531218

B. Lesage, I. Puaut, and A. Seznec, PRETI, Proceedings of the 20th International Conference on Real-Time and Network Systems, RTNS '12, pp.171-180, 2012.
DOI : 10.1145/2392987.2393009
URL : https://hal.archives-ouvertes.fr/hal-00661687

I. Li, E. Puaut, and . Rohou, Tracing Flow Information for Tighter WCET Estimation: Application to Vectorization, 2015 IEEE 21st International Conference on Embedded and Real-Time Computing Systems and Applications, pp.217-226, 2015.
DOI : 10.1109/RTCSA.2015.18
URL : https://hal.archives-ouvertes.fr/hal-01177902

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J. Marinho, V. Nélis, S. M. Petters, and I. Puaut, Preemption delay analysis for floating non-preemptive region scheduling, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp.497-502, 2012.
DOI : 10.1109/DATE.2012.6176520
URL : https://hal.archives-ouvertes.fr/hal-00649039

D. Potop-butucaru and I. Puaut, Integrated worst-case execution time estimation of multicore applications, 13th International Workshop on Worst-Case Execution Time Analysis, WCET 2013, pp.21-31, 2013.
URL : https://hal.archives-ouvertes.fr/hal-00909330

A. Rashid, G. Nelissen, D. Hardy, B. Akesson, I. Puaut et al., Cache-Persistence-Aware Response-Time Analysis for Fixed-Priority Preemptive Systems, 2016 28th Euromicro Conference on Real-Time Systems (ECRTS), pp.262-272, 2016.
DOI : 10.1109/ECRTS.2016.25
URL : https://hal.archives-ouvertes.fr/hal-01393220

J. Reineke, D. Grund, C. Berg, and R. Wilhelm, Timing predictability of cache replacement policies. Real-Time Systems, pp.99-122, 2007.
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DOI : 10.1145/1347375.1347389