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Layout-Oriented Synthesis of High Performance Analog Circuits

Abstract : This paper presents a methodology for the synthesis of high performance analog circuits. Layout parasitics are estimated and compensated during circuit sizing. Physical layout constraints are thus taken into consideration early in the design. This approach shortens the overall design time by avoiding laborious sizing-layout iterations. The approach has been implemented using two knowledge-based tools dedicated to analog circuit sizing and layout generation. An example of a high performance OTA is presented to illustrate the effectiveness of the approach.
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https://hal.archives-ouvertes.fr/hal-01573607
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Submitted on : Thursday, August 10, 2017 - 10:11:12 AM
Last modification on : Thursday, March 21, 2019 - 12:59:59 PM

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Mohamed Dessouky, Marie-Minerve Rosset-Louërat, Jacky Porte. Layout-Oriented Synthesis of High Performance Analog Circuits. Design Automation and Test in Europe Conference (DATE'2000), Mar 2000, Paris, France. pp.53-57, ⟨10.1109/DATE.2000.840015⟩. ⟨hal-01573607⟩

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