A Generic Programmable Arbiter with Default Master Grant

Frédéric Pétrot (1) , Denis Hommais (1)

1 ASIM - Architecture des Systèmes intégrés et Micro électronique

This paper details the design and implementation of a centralized bus arbiter implementing programmable fixed priorities arbitration. The arbiter also handles default master grant to the master with highest priority. The arbitration algorithm is computed using a tree of specialized comparators to fully exploit hardware parallelism. The design is implemented as a generic VHDL model whose parameter is the number of masters. After synthesis and place & route, a 16 masters arbiter has a critical path delay of 7.5 ns in 0.5 /spl mu/m technology.

Domaines: Informatique [cs]

Frédéric Pétrot, Denis Hommais. A Generic Programmable Arbiter with Default Master Grant. IEEE International Symposium on Circuits and Systems (ISCAS 2000), May 2000, Geneva, Switzerland. pp.749-752, ⟨10.1109/ISCAS.2000.857610⟩. ⟨hal-01573054⟩