Hierarchical Dataflow Model for Efficient Programming of Clustered Manycore Processors

Abstract : Programming Multiprocessor Systems-on-Chips (MPSoCs) with hundreds of heterogeneous Processing Elements (PEs), complex memory architectures, and Networks-on-Chips (NoCs) remains a challenge for embedded system designers. Dataflow Models of Computation (MoCs) are increasingly used for developing parallel applications as their high-level of abstraction eases the automation of mapping, task scheduling and memory allocation onto MPSoCs. This paper introduces a technique for deploying hierarchical dataflow graphs efficiently onto MPSoC. The proposed technique exploits different granularity of dataflow parallelism to generate both NoC-based communications and nested OpenMP loops. Deployment of an image processing application on a many-core MPSoC results in speedups of up to 58.7 compared to the sequential execution.
Document type :
Conference papers
Liste complète des métadonnées

Cited literature [10 references]  Display  Hide  Download

https://hal.archives-ouvertes.fr/hal-01564019
Contributor : Julien Hascoet <>
Submitted on : Tuesday, July 18, 2017 - 2:23:34 PM
Last modification on : Thursday, December 13, 2018 - 4:24:02 PM
Document(s) archivé(s) le : Saturday, January 27, 2018 - 7:45:31 AM

File

ASAP-2017-Hierarchical-Dataflo...
Files produced by the author(s)

Identifiers

  • HAL Id : hal-01564019, version 1

Citation

Julien Hascoët, Karol Desnos, Jean-François Nezan, Benoît Dupont de Dinechin. Hierarchical Dataflow Model for Efficient Programming of Clustered Manycore Processors. 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2017), Jul 2017, Seattle, WA, United States. ⟨hal-01564019⟩

Share

Metrics

Record views

220

Files downloads

341