Digital hardware implementation of a stochastic two-dimensional neuron model

Abstract : Keywords: Neuromorphic engineering Stochastic neuron Spiking neuron model Noise FPGA silicon neuron a b s t r a c t This study explores the feasibility of stochastic neuron simulation in digital systems (FPGA), which realizes an implementation of a two-dimensional neuron model. The stochasticity is added by a source of current noise in the silicon neuron using an Ornstein–Uhlenbeck process. This approach uses digital computation to emulate individual neuron behavior using fixed point arithmetic operation. The neuron mod-el's computations are performed in arithmetic pipelines. It was designed in VHDL language and simulated prior to mapping in the FPGA. The experimental results confirmed the validity of the developed stochastic FPGA implementation, which makes the implementation of the silicon neuron more biologically plausible for future hybrid experiments.
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https://hal.archives-ouvertes.fr/hal-01562687
Contributor : Timothée Levi <>
Submitted on : Monday, July 24, 2017 - 4:00:37 AM
Last modification on : Friday, July 26, 2019 - 1:12:03 PM

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Filippo Grassia, T Kohno, Timothée Levi. Digital hardware implementation of a stochastic two-dimensional neuron model. Journal of Physiology - Paris, Elsevier, 2017, ⟨10.1016/j.jphysparis.2017.02.002⟩. ⟨hal-01562687⟩

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