Opportunities and Obstacles of Monolithic III-V Integration on Silicon

Abstract : The massive growth of data flux and the quest for energy sustainability definitely push the scientific community to reinvent the concept of microprocessor.[1] The International Technology Roadmap of Semiconductors forecasts the emergence of hybrid microprocessors where different information technology solutions will coexist on a single chip.[2] In particular, photonic on-chip interconnects have early been proposed to replace electric interconnects for links requiring large data transfer or simply to reduce routing-induced power losses. However, such a paradigm shift is still hindered by the efficient integration of laser sources within the microprocessor architecture.[3] While the group IV photonics community is still far from demonstrating a microscale electrically-driven laser source,[4] the III-V on Si bonding approach seems to progressively impose itself as the reference for the integration of a small number lasers.[5], [6] Recent publications[7], [8] show that a third approach may challenge the later: monolithic III-V integration on silicon. In this talk, we will discuss the potential of monolithic III-V integration on Si in the framework of on-chip information technologies as well as the technological obstacles that the scientific community should overcome. This analysis will be done from the physical level of individual components where performances, lifetimes and CMOS compatibility are the main criteria to the system level where architecture design, production issues and costs then enter into account. [1]D. A. B. Miller, “Device Requirements for Optical Interconnects to Silicon Chips,” Proc. IEEE, vol. 97, no. 7, pp. 1166–1185, Jul. 2009. [2]ITRS, “2013 Executive Summary.” 2013. [3]T. Baehr-Jones, T. Pinguet, P. Lo Guo-Qiang, S. Danziger, D. Prather, and M. Hochberg, “Myths and rumours of silicon photonics,” Nat. Photonics, vol. 6, no. 4, pp. 206–208, Apr. 2012. [4]Y. Takahashi, Y. Inui, M. Chihara, T. Asano, R. Terawaki, and S. Noda, “A micrometre-scale Raman silicon laser with a microwatt threshold,” Nature, vol. 498, no. 7455, pp. 470–474, Jun. 2013. [5]T. Alexoudi et al., “III–V-on-Si Photonic Crystal Nanocavity Laser Technology for Optical Static Random Access Memories,” IEEE J. Sel. Top. Quantum Electron., vol. 22, no. 6, pp. 1–10, Nov. 2016. [6]D. Liang, X. Huang, G. Kurczveil, M. Fiorentino, and R. G. Beausoleil, “Integrated finely tunable microring laser on silicon,” Nat. Photonics, vol. 10, no. 11, pp. 719–722, Sep. 2016. [7]S. Chen et al., “Electrically pumped continuous-wave III–V quantum dot lasers on silicon,” Nat Photon, vol. advance online publication, Mar. 2016. [8]Y. Wan et al., “Room Temperature CW 1.3 μm Single Mode Lasing of InAs Quantum Dot Micro-disk Lasers Grown on (001) Si,” in Conference on Lasers and Electro-Optics (2016), paper SM1G.3, 2016, p. SM1G.3.
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Yoan Léger, Ronan Tremblay, Antoine Létoublon, Charles Cornet. Opportunities and Obstacles of Monolithic III-V Integration on Silicon. Design, Automation & Test in Europe conference (DATE 2017) - 3rd International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS Workshop), Mar 2017, Lausanne, Switzerland. ⟨hal-01549924⟩



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