Design Validation of ZCSP with SPIN

Vincent Beaudenon (1) , Emmanuelle Encrenaz (1) , Jean-Lou Desbarbieux (1)

1 ASIM - Architecture des Systèmes intégrés et Micro électronique

We consider the problem of specifying a model of the zero copy secured protocol for the purpose of LTL verification with the SPIN model checker. ZCSP is based on direct memory access. Data is directly read/written in user space memory, decreasing latency and saving processor computing time. We first introduce the ZCSP protocol before analysing different ways of modelling it. Two main steps were performed: a finite and a nonfinite sequences model. The first model gave us an overview of the protocol robustness. The second allowed us to test realistic properties. We also describe LTL properties that were checked with the SPIN model checker. Unfortunately, the size of the system was frequently prohibitive. Thus, we explain all minimization steps we had to perform: variables' domains restriction, interleaving reduction, realistic environment representation by fairness constraints.

Domaines: Informatique [cs]

Vincent Beaudenon, Emmanuelle Encrenaz, Jean-Lou Desbarbieux. Design Validation of ZCSP with SPIN. IEEE Third International Conference on Application of Concurrency to System Design (ACSD 2003), Jun 2003, Guimaraes, Portugal. pp.102-110, ⟨10.1109/CSD.2003.1207704⟩. ⟨hal-01534544⟩