Guidelines for Designing Smart and Reusable Analog IP Cores

Abstract : Every analog designer has to face with the legacy of the traditional analog development, an iterative conception process where a single computation loop can last a week. The tremendous gap between the analog and the digital world’s methodology of conception is sharper than ever. The reasons should be found both in the lack of automated tools and in the methodology itself. If a few commercial and academic softwares offer development environments, these environments do not easily allow creating analog generators because of lack of clear methodology. This paper presents a guideline for designing smart and reusable analog generators as an answer to the problem of analog IPs.
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Conference papers
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Submitted on : Thursday, May 11, 2017 - 2:51:31 PM
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  • HAL Id : hal-01521137, version 1

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Pierre Nguyen-Tuong, Marie-Minerve Rosset-Louërat, Alain Greiner. Guidelines for Designing Smart and Reusable Analog IP Cores. Sophia Antipolis MicroElectronics Forum (SAME), Oct 2004, Sophia Antipolis, France. pp.1-6. ⟨hal-01521137⟩

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