Radiation Experiments on a 28nm Single-Chip Many-core Processor and SEU error-rate prediction

Abstract : This work evaluates the SEE static and dynamic sensitivity of a single-chip many-core processor having implemented 16 compute clusters, each one with 16 processing cores. The SEU error-rate of an application implemented in the device is predicted by combining experimental results with those issued from fault injection campaigns applying the CEU (Code Emulating Upsets) approach. In addition, a comparison of the dynamic tests when processing-cores cache memories are enabled and disabled is presented. The experiments were validated through radiation ground testing performed with 14 MeV neutrons on the MPPA- 256 many-core processor manufactured in TSMC CMOS 28HP technology. An analysis of the erroneous results in processor GPRs was carried-out in order to explain their possible causes.
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https://hal.archives-ouvertes.fr/hal-01459823
Contributor : Lucie Torella <>
Submitted on : Tuesday, February 7, 2017 - 2:37:34 PM
Last modification on : Tuesday, April 2, 2019 - 2:52:13 AM

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Distributed under a Creative Commons Attribution - NonCommercial 4.0 International License

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Vanessa Vargas, Pablo Ramos, Vincent Ray, Camille Jalier, Renaud Stevens, et al.. Radiation Experiments on a 28nm Single-Chip Many-core Processor and SEU error-rate prediction. IEEE Transactions on Nuclear Science, Institute of Electrical and Electronics Engineers, 2017, 64 (1), pp.483-490. ⟨10.1109/TNS.2016.2638081⟩. ⟨hal-01459823⟩

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