L. Apvrille, Webpage of TTool, 2015.

F. Balarin, Y. Watanabe, H. Hsieh, L. Lavagno, C. Passerone et al., Metropolis: an integrated electronic system design environment, Computer, vol.36, issue.4, pp.45-52, 2003.
DOI : 10.1109/MC.2003.1193228

A. Basu, S. Bensalem, M. Bozga, J. Combaz, M. Jaber et al., Rigorous Component-Based System Design Using the BIP Framework, IEEE Software, vol.28, issue.3, 2011.
DOI : 10.1109/MS.2011.27
URL : https://hal.archives-ouvertes.fr/hal-00722395

A. Becoulet, Mutekh operating system (webpage ), 2009.

J. Bengtsson, Y. , and W. , Timed Automata: Semantics, Algorithms and Tools, Lecture Notes on Concurrency and Petri Nets, p.87, 2004.
DOI : 10.1007/978-3-540-27755-2_3
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.332.8701

B. Blanchet, Proverif automatic cryptographic protocol verifier user manual, CNRS, 2010.
DOI : 10.1109/csfw.2001.930138
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.14.5150

J. Buck, S. Ha, E. A. Lee, and D. G. Messerschmitt, Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems, pp.527-543, 2002.
DOI : 10.1016/B978-155860702-6/50048-X

A. Enrici, L. Apvrille, and R. Pacalet, A UML Model-Driven Approach to Efficiently Allocate Complex Communication Schemes, MOD- ELS conference, 2014.
DOI : 10.1007/978-3-319-11653-2_23

C. Erbas, S. Cerav-erbas, and A. D. Pimentel, Multiobjective optimization and evolutionary algorithms for the application mapping problem in multiprocessor system-on-chip design, IEEE Transactions on Evolutionary Computation, vol.10, issue.3, pp.358-374, 2006.
DOI : 10.1109/TEVC.2005.860766

P. H. Feiler, B. A. Lewis, S. Vestal, C. , and E. , An Overview of the SAE Architecture Analysis & Design Language (AADL) Standard: A Basis for Model-Based Architecture-Driven Embedded Systems Engineering, IFIP, vol.176, pp.3-15, 2004.
DOI : 10.1007/0-387-24590-1_1

A. Gamatié, S. L. Beux, ´. E. Piel, R. B. Atitallah, A. Etien et al., A Model-Driven Design Framework for Massively Parallel Embedded Systems, ACM Transactions on Embedded Computing Systems, vol.10, issue.4, p.39, 2011.
DOI : 10.1145/2043662.2043663

D. Genius and L. Apvrille, Virtual yet precise prototyping : An automotive case study, ERTSS'2016, 2016.
URL : https://hal.archives-ouvertes.fr/hal-01291888

D. Genius, E. Faure, and N. Pouillon, Mapping a Telecommunication Application on a??Multiprocessor System-on-Chip, Algorithm-Architecture Matching for Signal and Image Processing, pp.53-77, 2011.
DOI : 10.1007/978-90-481-9965-5_3
URL : https://hal.archives-ouvertes.fr/hal-01287781

G. Kahn, The semantics of a simple language for parallel programming, Information Processing '74: Proceedings of the IFIP Congress, pp.471-475, 1974.

E. Kelling, M. Friedewald, T. Leimbach, M. Menzel, P. Sieger et al., Specification and evaluation of e-security relevant use cases, 2009.

B. Kienhuis, E. Deprettere, P. Van-der-wolf, and K. Vissers, A Methodology to Design Programmable Embedded Systems, Embedded Processor Design Challenges, pp.18-37, 2002.
DOI : 10.1007/3-540-45874-3_2

D. Knorreck, L. Apvrille, and R. Pacalet, Formal System-level Design Space Exploration. Concurrency and Computation: Practice and Experience, pp.250-264, 2013.
DOI : 10.1002/cpe.2802

L. Li, L. Apvrille, and D. Genius, Virtual prototyping of automotive systems: Towards multi-level design space exploration, Conference on Design and Architectures for Signal and Image Processing, 2016.
URL : https://hal.archives-ouvertes.fr/hal-01365609

G. Pedroza, D. Knorreck, and L. Apvrille, AVATAR: A SysML Environment for the Formal Verification of Safety and Security Properties, 2011 11th Annual International Conference on New Technologies of Distributed Systems, 2011.
DOI : 10.1109/NOTERE.2011.5957992

A. D. Pimentel, L. O. Hertzberger, P. Lieverse, P. Van-der-wolf, and E. F. Deprettere, Exploring embedded-systems architectures with Artemis, Computer, vol.34, issue.11, pp.3457-63, 2001.
DOI : 10.1109/2.963445

. Soclib-consortium, SoCLib: an open platform for virtual prototyping of multiprocessors system on chip (webpage) In http://www.soclib.fr. Sodius Corporation (2016) MDGen for SystemC, 2010.

S. Syed-alwi, C. Braunstein, and E. Encrenaz, Efficient Refinement Strategy Exploiting Component Properties in a CEGAR Process, Lecture Notes in Electrical Engineerin g, vol.265, issue.2, pp.17-36, 2013.
DOI : 10.1007/978-3-319-01418-0_2
URL : https://hal.archives-ouvertes.fr/hal-01221722

J. Vidal, F. De-lamotte, G. Gogniat, P. Soulard, and J. Diguet, A co-design approach for embedded system modeling and code generation with UML and MARTE, 2009 Design, Automation & Test in Europe Conference & Exhibition, pp.226-231, 2009.
DOI : 10.1109/DATE.2009.5090662
URL : https://hal.archives-ouvertes.fr/hal-00369036

. Vsi-alliance, Virtual Component Interface Standard (OCB 2 2.0), 2000.

H. Yu, P. Joshi, J. Talpin, S. K. Shukla, and S. Shiraishi, The challenge of interoperability, Proceedings of the 52nd Annual Design Automation Conference on, DAC '15, pp.581-58, 2015.
DOI : 10.1145/2744769.2747945