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A simple 3.8mW, 300 MHz, 4-bit flash analog-to-digital converter

Abstract : This paper presents a fully differential comparator that can be used in a N bit Flash A/D converter as continuous-time sigma-delta modulator quantizer. The comparator is an extension of the dynamic comparator presented by Lewis and Gray, resulting in a 4 bit A/D. Its main advantages are : compact architecture based on MOS transistor only, without any passive components such as resistance ladder or switch capacitance, fully differential input and output voltages, operating at very low voltage. Using this comparator, a 4 bit flash A/D converter has been designed in a 0.13μm CMOS technology, under 1.2V supply voltage. It operates at 300Msample/s, suitable for over sampled data converter. The simulation shows a 3.8mW power consumption for the whole ADC.
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Contributor : Lip6 Publications <>
Submitted on : Monday, December 19, 2016 - 5:15:49 PM
Last modification on : Friday, January 8, 2021 - 5:32:07 PM



Laurent de Lamarre, Marie-Minerve Rosset-Louërat, Andreas Kaiser. A simple 3.8mW, 300 MHz, 4-bit flash analog-to-digital converter. Microtechnologies for the New Millennium 2005 VLSI Circuits and Systems II, May 2005, Sevilla, Spain. pp.825-832, ⟨10.1117/12.608343⟩. ⟨hal-01419641⟩



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