Skip to Main content Skip to Navigation
Conference papers

HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic

Abstract : High-Level Synthesis (HLS) is used by hardware developers to achieve higher abstraction in circuit descriptions. In order to shorten the hardware development time via HLS, we present an adjustment of the Iterative and Incremental Design (IID) methodology, frequently used in software development. In particular, our methodology is relevant for the development of applications with unusual complexity: the method was applied here to the development of large modular arithmetic, commonly used for cryptography applications (e.g., Elliptic Curves). Rapid feedback on circuit characteristics is used to evaluate deep architectural changes in short time, greatly reducing the time-to-market with respect to hand-made designs. In addition, our approach is highly flexible, since the same generic high-level description can be used to produce an entire set of circuits, each with different area/performance trade-offs. Thanks to the proposed approach, any change to the initial specification (e.g., the curve used) is also very fast, while it may require a large effort in the case of hand-made designs.
Complete list of metadata

Cited literature [25 references]  Display  Hide  Download
Contributor : Alban Bourge Connect in order to contact the contributor
Submitted on : Thursday, November 3, 2016 - 9:21:43 AM
Last modification on : Thursday, November 4, 2021 - 3:08:01 PM
Long-term archiving on: : Saturday, February 4, 2017 - 1:12:51 PM


Files produced by the author(s)





Simon Pontie, Alban Bourge, Adrien Prost-Boucle, Paolo Maistri, Olivier Muller, et al.. HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic. 2016 Euromicro Conference on Digital System Design (DSD), 2016, Limassol, Cyprus. pp.511-518, ⟨10.1109/DSD.2016.51⟩. ⟨hal-01389247⟩



Record views


Files downloads