Exploiting Large Memory using 32-bit Energy-Efficient Manycore Architectures

Mohamed Lamine Karaoui 1 Pierre-Yves Péneau 2, 1 Quentin L. Meunier 1 Franck Wajsbürt 1 Alain Greiner 1
1 ALSOC - Architecture et Logiciels pour Systèmes Embarqués sur Puce
LIP6 - Laboratoire d'Informatique de Paris 6
2 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Recent advances in processor manufacturing has led to integrating tens of cores in a single chip and promise to integrate many more with the so-called manycore architectures. Manycore architectures usually integrate many small power efficient cores, which can be 32-bit cores in order to maximize the performance per Watt ratio. Providing large physical memory (e.g. 1 TB) to such architectures thus requires extending the physical address space (e.g. to 40 bits). This extended physical space has early been identified as a problem for 32-bit operating systems as they can normally support at maximum 4 GB of physical space, and up to 64 GB with memory extension techniques. This paper presents a scalable solution which efficiently manages large physical memory. The proposed solution decomposes the kernel into multiple units, each running in its own space, without the virtual memory mechanism (directly in physical mode). User applications, however, continue to run in the virtual mode. This solution allows the kernel to manage a large physical memory, while allowing user space applications to access nearly 4 GB of virtual space. It has been successfully implemented in ALMOS, a UNIX-like operating system, running on the TSAR manycore architecture, which is a 32-bit virtual 40-bit physical manycore architecture. Moreover, the first results show that this approach improves both the scalability and the performance of the system.
Complete list of metadatas

Cited literature [16 references]  Display  Hide  Download

https://hal.sorbonne-universite.fr/hal-01362760
Contributor : Quentin Meunier <>
Submitted on : Friday, September 9, 2016 - 11:15:11 AM
Last modification on : Tuesday, June 18, 2019 - 3:47:42 PM
Long-term archiving on : Saturday, December 10, 2016 - 1:16:40 PM

File

McSOC_final_version.pdf
Files produced by the author(s)

Identifiers

Citation

Mohamed Lamine Karaoui, Pierre-Yves Péneau, Quentin L. Meunier, Franck Wajsbürt, Alain Greiner. Exploiting Large Memory using 32-bit Energy-Efficient Manycore Architectures. MCSoC: Many-core Systems-on-Chip, Sep 2016, Lyon, France. pp.61-68, ⟨10.1109/MCSoC.2016.44⟩. ⟨hal-01362760⟩

Share

Metrics

Record views

951

Files downloads

296