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Conference papers
Harnessing fabrication process signature for predicting yield across designs
Ai Ahmadi 1
Author
Haralampos-G. Stratigopoulos 2
Author IdHAL : haralampos-stratigopoulos
Amit Nahar 3
Author
Bob Orr 3
Author
Michael Pas 3
Author
Yiorgos Makris 1
Author
1
UT Dallas - University of Texas at Dallas [Richardson] (800 West Campbell Road, Richardson, TX 75080-3021 - United States)
2
CIAN - Circuits Intégrés Numériques et Analogiques (France)
- LIP6 - Laboratoire d'Informatique de Paris 6 (4 Place JUSSIEU 75252 PARIS CEDEX 05 - France)
- UPMC - Université Pierre et Marie Curie - Paris 6 (4 place Jussieu - 75005 Paris - France)
- CNRS - Centre National de la Recherche Scientifique : UMR7606 (France)
3
Texas Instruments Inc. (France)
Document type :
Conference papers
Complete list of metadata
https://hal.sorbonne-universite.fr/hal-01359613
Contributor : Haralampos Stratigopoulos <>
Submitted on : Friday, September 2, 2016 - 5:33:18 PM
Last modification on : Friday, January 8, 2021 - 5:32:07 PM
Contributor : Haralampos Stratigopoulos <>
Submitted on : Friday, September 2, 2016 - 5:33:18 PM
Last modification on : Friday, January 8, 2021 - 5:32:07 PM
Identifiers
- HAL Id : hal-01359613, version 1
- DOI : 10.1109/ISCAS.2016.7527386
Collections
UPMC | CNRS | TDS-MACS | LIP6 | LIP6-CIAN | SORBONNE-UNIVERSITE | SU-SCIENCES
Citation
Ai Ahmadi, Haralampos-G. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, et al.. Harnessing fabrication process signature for predicting yield across designs. IEEE International Symposium on Circuits and Systems, May 2016, Montreal, Canada. ⟨10.1109/ISCAS.2016.7527386⟩. ⟨hal-01359613⟩
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