Harnessing fabrication process signature for predicting yield across designs

Ai Ahmadi (1) , Haralampos-G. Stratigopoulos (2) , Amit Nahar (3) , Bob Orr (3) , Michael Pas (3) , Yiorgos Makris (1)

1 UT Dallas - University of Texas at Dallas [Richardson]
2 CIAN - Circuits Intégrés Numériques et Analogiques
3 Texas Instruments Inc.

Domaines: Ingénierie assistée par ordinateur; Modélisation et simulation; Micro et nanotechnologies/Microélectronique; Electronique

Ai Ahmadi, Haralampos-G. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, et al.. Harnessing fabrication process signature for predicting yield across designs. IEEE International Symposium on Circuits and Systems, May 2016, Montreal, Canada. ⟨10.1109/ISCAS.2016.7527386⟩. ⟨hal-01359613⟩