Dictionary Sharing: An Efficient Cache Compression Scheme for Compressed Caches

Biswabandan Panda 1 André Seznec 1
1 PACAP - Pushing Architecture and Compilation for Application Performance
IRISA-D3 - ARCHITECTURE, Inria Rennes – Bretagne Atlantique
Abstract : The effectiveness of a compressed cache depends on three features: i) the compression scheme, ii) the compaction scheme, and iii) the cache layout of the compressed cache. Skewed compressed cache (SCC) and yet another compressed cache (YACC) are two recently proposed compressed cache layouts that feature minimal storage and latency overheads, while achieving comparable performance over more complex compressed cache layouts. Both SCC and YACC use compression techniques to compress individual cache blocks, and then a compaction technique to compact multiple contiguous compressed blocks into a single data entry. The primary attribute used by these techniques for compaction is the compression factor of the cache blocks, and in this process, they waste cache space. In this paper, we propose dictionary sharing (DISH), a dictionary based cache compression scheme that reduces this wastage. DISH compresses a cache block by keeping in mind that the block is a potential candidate for the compaction process. DISH encodes a cache block with a dictionary that stores the distinct 4-byte chunks of a cache block and the dictionary is shared among multiple neighboring cache blocks. The simple encoding scheme of DISH also provides a single cycle decompression latency and it does not change the cache layout of compressed caches. Compressed cache layouts that use DISH outperforms the compression schemes, such as BDI and CPACK+Z, in terms of compression ratio (from 1.7X to 2.3X), system performance (from 7.2% to 14.3%), and energy efficiency (from 6% to 16%).
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Submitted on : Thursday, March 9, 2017 - 12:10:46 PM
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Biswabandan Panda, André Seznec. Dictionary Sharing: An Efficient Cache Compression Scheme for Compressed Caches. MICRO 2016 - 49th Annual IEEE/ACM International Symposium on Microarchitecture, IEEE/ACM, Oct 2016, Taipei, Taiwan. ⟨hal-01354246v3⟩

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