Optimizing Resistances and Capacitances of a Continuous-Time Sigma-Delta Modulator

Laurent de Lamarre (1) , Marie-Minerve Louërat (1) , Andreas Kaiser (2)

1 CIAN - Circuits Intégrés Numériques et Analogiques
2 IEMN - Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520

The integration capacitor is an important issue when being faced with the power consumption of a ΣΔ analog-to-digital converter. In this paper, we show how the integration capacitance can be derived from signal to noise ratio specifications. In order to decrease the total power consumption of the ΣΔ modulator, a method that optimizes the value of the integrator stage capacitors in the modulator loop filter is proposed.

Domaines: Informatique [cs]

Laurent de Lamarre, Marie-Minerve Louërat, Andreas Kaiser. Optimizing Resistances and Capacitances of a Continuous-Time Sigma-Delta Modulator. ICECS IEEE International Conference on Electronics Circuits and Systems, Dec 2006, Nice, France. pp.419-422, ⟨10.1109/ICECS.2006.379814⟩. ⟨hal-01338469⟩