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A New Paradigm and Associated Tools for TLM/T Modeling of MPSoCs

Abstract : The paper presents a way to speed-up simulation of complex MPSoCs at the TLM/T (transaction level modeling with time) level and a way to switch from abstraction level "at run time". The hardware part of the platform is described in standard SystemC. Rather than using statistical models for adding timing, to obtain an accurate view of the platform dynamic contention is taken into account. This allows to reach a speed-up of up to 50 versus a corresponding BCA simulation with a low timing error. The state saving method gives the ability to save the state of a platform at the TLM/T level and move it to the same platform described at the BCA level. This allows fast and accurate debugging of the embedded software.
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Submitted on : Tuesday, June 28, 2016 - 10:55:21 AM
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Emmanuel Viaud, François Pêcheux. A New Paradigm and Associated Tools for TLM/T Modeling of MPSoCs. PRIME IEEE Conference on Ph.D. Research in MicroElectronics and Electronics, Jun 2006, Otranto, Italy. pp.217-220, ⟨10.1109/RME.2006.1689935⟩. ⟨hal-01338245⟩



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