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A new Multilevel Hierarchical MFPGA and its suitable configuration tools

Zied Marrakchi 1 Hayder Mrabet 1 Habib Mehrez 1
1 CIAN - Circuits Intégrés Numériques et Analogiques
LIP6 - Laboratoire d'Informatique de Paris 6
Abstract : In this paper we evaluate a new multilevel hierarchical MFPGA. The specific architecture includes two unidirectional programmable networks. A downward network based on the butterfly-fat-tree topology, and a special rising network. New tools are developed to place and route several benchmark circuits on this architecture. Comparison with the traditional symmetric, Manhattan mesh architecture shows that MFPGA can implement circuits with fewer switches and a smaller area.
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Submitted on : Tuesday, June 28, 2016 - 10:39:35 AM
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Zied Marrakchi, Hayder Mrabet, Habib Mehrez. A new Multilevel Hierarchical MFPGA and its suitable configuration tools. ISVLSI IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures, Mar 2006, Karlsruhe, Germany. pp.263-268, ⟨10.1109/ISVLSI.2006.6⟩. ⟨hal-01338233⟩



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