Software-Based Self-Test of Register Files in RISC Processor Cores using March Algorithms

Abstract : Beside external test and hardware Built-In Self-Test techniques, a non-intrusive low-cost strategy has been developed: Software-Based Self-Test. SBST component-oriented approach for microprocessor allows to reach, with small self-test programs, a high fault coverage. In this context, this paper focuses on the test of the Register File of RISC processor cores. This component has the structure of a small memory. Then, using the appropriate March tests, 100% fault coverage for numerous fault models can be reached. This method was applied to test the Register File of a MIPS microprocessor. Results show that the method allows to obtain small-sized self-test programs while the use of March tests ensures a high test quality.
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Conference papers
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https://hal.archives-ouvertes.fr/hal-01338232
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Submitted on : Tuesday, June 28, 2016 - 10:38:36 AM
Last modification on : Thursday, March 21, 2019 - 2:16:19 PM

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  • HAL Id : hal-01338232, version 1

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Matthieu Tuna, Mounir Benabdenbi. Software-Based Self-Test of Register Files in RISC Processor Cores using March Algorithms. LATW IEEE Latin-American Test Workshop digest of papers, Mar 2006, Buenos Aires, Argentina. pp.67-72. ⟨hal-01338232⟩

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