M. Herlihy and J. E. Moss, Transactional memory, ACM SIGARCH Computer Architecture News, vol.21, issue.2, pp.289-300, 1993.
DOI : 10.1145/173682.165164

P. Felber, C. Fetzer, and T. , Dynamic performance tuning of word-based software transactional memory, Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming , PPoPP '08, pp.237-246, 2008.
DOI : 10.1145/1345206.1345241

P. Damron, A. Fedorova, Y. Lev, V. Luchangco, M. Moir et al., Hybrid transactional memory, ACM SIGPLAN Notices, vol.41, issue.11, pp.336-346, 2006.
DOI : 10.1145/1168918.1168900

M. B. Castro, Improving the Performance of Transactional Memory Applications on Multicores: A Machine Learning-based Approach, 2012.
URL : https://hal.archives-ouvertes.fr/tel-00766983

J. O. Kephart and D. M. Chess, The vision of autonomic computing, Computer, vol.36, issue.1, pp.41-50, 2003.
DOI : 10.1109/MC.2003.1160055

M. C. Huebscher and J. A. Mccann, A survey of autonomic computing???degrees, models, and applications, ACM Computing Surveys, vol.40, issue.3, pp.1-728, 2008.
DOI : 10.1145/1380584.1380585

M. Ansari, C. Kotselidis, K. Jarvis, M. Luján, C. Kirkham et al., Advanced Concurrency Control for Transactional Memory Using Transaction Commit Rate, Proceedings of the 14th International Euro-Par Conference on Parallel Processing, Euro-Par '08, pp.719-728, 2008.
DOI : 10.1007/978-3-540-85451-7_77

D. Rughetti, P. Di-sanzo, B. Ciciani, and F. Quaglia, Machine learningbased self-adjusting concurrency in software transactional memory systems, Modeling, Analysis Simulation of Computer and Telecommunication Systems (MASCOTS), 2012 IEEE 20th International Symposium on, pp.278-285, 2012.

D. Didona, P. Felber, D. Harmanci, P. Romano, and J. Schenker, Identifying the Optimal Level of Parallelism in Transactional Memory Applications, Lecture Notes in Computer Science, vol.7853, pp.233-247, 2013.
DOI : 10.1007/978-3-642-40148-0_17

K. Ravichandran and S. Pande, F2C2-STM: Flux-Based Feedback-Driven Concurrency Control for STMs, 2014 IEEE 28th International Parallel and Distributed Processing Symposium, pp.927-938, 2014.
DOI : 10.1109/IPDPS.2014.99

Z. Wang and M. F. O-'boyle, Mapping parallelism to multi-cores, ACM SIGPLAN Notices, vol.44, issue.4, pp.75-84, 2009.
DOI : 10.1145/1594835.1504189

C. , C. Minh, J. Chung, C. Kozyrakis, and K. Olukotun, STAMP: Stanford transactional applications for multi-processing, IEEE International Symposium on Workload Characterization (IISWC), 2008.

S. Hong, T. Oguntebi, J. Casper, N. Bronson, C. Kozyrakis et al., EigenBench: A simple exploration tool for orthogonal TM characteristics, 2010 IEEE International Symposium on Workload Characterization (IISWC), pp.1-11, 2010.

W. Ruan, Y. Liu, and M. Spear, STAMP need not be considered harmful, 9th ACM SIGPLAN Workshop on Transactional Computing, 2014.