Reconfigurable architecture of VDF filter for multidimensional data
Résumé
In this paper, we present a hardware reconfigurable architecture of vector directional filter (VDF) and an experimental validation based on HW/SW implementation context. An FPGA with a Nios II processor combines the benefits of a programmable logic component as well as a microprocessor. VDF is very useful in multidimensional data (such as color images) for noise removal and details preservation. Comparative results between simulations of ANSI-C and hardware implementation are given. An estimate method of nonlinear function is presented and serves as an approximation for the appropriate hardware implementation on FPGA. Finally, to verify the functionality of the implementation, a validation state using FPGA platform has been performed. This validation demonstrated that our implementation hardware system speeds up the filtering process as well as preserving a high data quality (image quality)