On the Development and Optimization of HEVC Video Decoders Using High-Level Dataflow Modeling

Khaled Jerbi (1) , Hervé Yviquel (1) , Alexandre Sanchez (1) , Daniele Renzi (2) , Damien de Saint Jorre (2) , Claudio Alberti (2) , Marco Mattavelli (2) , Mickael Raulet (1)

1 IETR - Institut d'Électronique et des Technologies du numéRique
2 EPFL - Ecole Polytechnique Fédérale de Lausanne

With the emergence of the High Efficiency Video Coding (HEVC) standard, a dataflow description of the decoder part was developed as part of the MPEG-B standard. This dataflow description presented modest framerate results which led us to propose methodolo-gies to improve the performance. In this paper, we introduce architectural improvements by exposing more parallelism using YUV and frame-based parallel decoding. We also present platform optimizations based on the use of SIMD functions and cache efficient FIFOs. Results show an average acceleration factor of 5.8 in the decoding framerate over the reference architecture.

Domaines: Traitement du signal et de l'image [eess.SP]

Khaled Jerbi, Hervé Yviquel, Alexandre Sanchez, Daniele Renzi, Damien de Saint Jorre, et al.. On the Development and Optimization of HEVC Video Decoders Using High-Level Dataflow Modeling. Journal of Signal Processing Systems, 2017, 87 (1), pp.127-138. ⟨10.1007/s11265-016-1113-x⟩. ⟨hal-01298595⟩