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ASIF: Application Specific Inflexible FPGA

Husain Parvez 1 Zied Marrakchi 2 Habib Mehrez 1
1 CIAN - Circuits Intégrés Numériques et Analogiques
LIP6 - Laboratoire d'Informatique de Paris 6
2 ALSOC - Architecture et Logiciels pour Systèmes Embarqués sur Puce
LIP6 - Laboratoire d'Informatique de Paris 6
Abstract : An application specific inflexible FPGA (ASIF) is an FPGA with reduced flexibility that can implement a set of application circuits which will operate at mutually exclusive times. These circuits are efficiently placed and routed on an FPGA to minimize the total routing switches required by the architecture. Later all the unused routing switches are removed from the FPGA to generate an ASIF. An ASIF for a set of 17 MCNC benchmark circuits is found to be 5.43 times (81.5%) smaller than a mesh-based unidirectional FPGA required to map any of these circuits.
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Submitted on : Wednesday, March 30, 2016 - 2:10:59 PM
Last modification on : Thursday, March 21, 2019 - 1:06:43 PM



Husain Parvez, Zied Marrakchi, Habib Mehrez. ASIF: Application Specific Inflexible FPGA. ICFPT International Conference on Field-Programmable Technology, Dec 2009, Sydney, Australia. pp.112-119, ⟨10.1109/FPT.2009.5377657⟩. ⟨hal-01295122⟩



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