Hierarchical Sizing and Biasing of Analog Firm Intellectual Properties

Abstract : We demonstrate hierarchical sizing and biasing methodology in CAIRO+ that automatically generates suitable designs plans used to compute the DC operating point and dimensions for analog firm IPs.
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Conference papers
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https://hal.archives-ouvertes.fr/hal-01295050
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Submitted on : Wednesday, March 30, 2016 - 11:59:10 AM
Last modification on : Thursday, March 21, 2019 - 1:00:08 PM

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  • HAL Id : hal-01295050, version 1

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Ramy Iskander, Marie-Minerve Louërat, Andreas Kaiser. Hierarchical Sizing and Biasing of Analog Firm Intellectual Properties. DATE University Booth, Mar 2009, Nice, France. pp.1-2. ⟨hal-01295050⟩

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