RTL Simulation of an Asynchronous Reading Architecture for an Event-driven Image Sensor
Résumé
In this paper, we explain and validate the architecture of a fully asynchronous reading system dedicated to an event-driven image sensor. The proposed architecture is modelled with a hardware description language. Firstly, the reading method relies on reducing the output data flow of the image sensor. Therefore, the image sensor global activity is limited to the effective and relevant pixel information. Moreover, this reading technique is capable of suppressing spatial redundancies. Furthermore, the analog to digital converter, which usually is the most consuming component in a standard reading system, has been removed in our architecture. The fully asynchronous Register-Transfer level model of our reading system has been tested and validated using a real picture as a testbench. Finally, the comparison with a standard reading system shows that for a similar PSNR, we are able to drastically reduce the image data flow.