The Effect of S-box Design on Pipelined AES Using FPGAs

Karim Moussa Ali Abdellatif; Roselyne Chotin-Avot; Habib Mehrez

Conference papers

The Effect of S-box Design on Pipelined AES Using FPGAs

Karim Moussa Ali Abdellatif Roselyne Chotin-Avot ¹ Habib Mehrez ¹

1 CIAN - Circuits Intégrés Numériques et Analogiques

LIP6 - Laboratoire d'Informatique de Paris 6

Abstract : This work discuses the difference between three methods are used to implement S-box stage of AES. BRAM, composite field, and ROM are these methods. The comparison is based on FPGA implementation of these methods.

Keywords : Applied cryptography

Document type :

Conference papers

Domain :

Computer Science [cs] / Hardware Architecture [cs.AR]

Complete list of metadata

https://hal.sorbonne-universite.fr/hal-01265624
Contributor : Roselyne Chotin Connect in order to contact the contributor
Submitted on : Monday, February 1, 2016 - 1:41:42 PM
Last modification on : Tuesday, November 16, 2021 - 5:03:26 AM

The Effect of S-box Design on Pipelined AES Using FPGAs

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The Effect of S-box Design on Pipelined AES Using FPGAs

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