C. Engelmann and F. Lauer, Facilitating co-design for extreme-scale systems through lightweight simulation, the IEEE International Conference on Cluster Computing Workshops and Posters, CLUSTER WORKSHOPS, pp.1-8, 2010.

D. Lugato, J. Bruel, and I. Ober, Model-Driven Engineering for High Performance Computing Applications Modeling Simulation and Optimization-Focus on Applications, 2010.

M. Object and . Group, Unified Modeling Language specification, version 2.1. Available: http://www.omg.org/spec

W. Ecker, W. Müller, and R. Dömer, Hardware-dependent Software, pp.1-13, 2009.

I. Standard and . Ip-xact, Standard Structure for Packaging, Integrating, and Reusing IP within Tools Flows, IEEE Std, pp.1-360, 1685.

M. Object and . Group, UML Profile for MARTE: Modeling and Analysis of Real-Time Embedded Systems, version 1.0. Available: http://www.omg.org/spec

M. Pelcat, K. Desnos, J. Heulot, C. Guy, J. Nezan et al., Preesm: A dataflow-based rapid prototyping framework for simplifying multicore DSP programming, 2014 6th European Embedded Design in Education and Research Conference (EDERC), pp.36-40, 2014.
DOI : 10.1109/EDERC.2014.6924354

URL : https://hal.archives-ouvertes.fr/hal-01059313

G. Ochoa-ruiz, O. Labbani, and E. Bourennane, A high-level methodology for automatically generating dynamic partially reconfigurable systems using IP-XACT and the UML MARTE profile, Design Automation for Embedded Systems, vol.16, issue.3, pp.93-128, 2012.
DOI : 10.1007/s10617-012-9098-6

URL : https://hal.archives-ouvertes.fr/hal-00745377

F. Herrera, H. Posadas, E. Villar, and D. Calvo, Enhanced IP-XACT Platform Descriptions for Automatic Generation from UML/MARTE of Fast Performance Models for DSE, 2012 15th Euromicro Conference on Digital System Design, pp.692-699, 2012.
DOI : 10.1109/DSD.2012.51

F. Herrera and E. Villar, A Framework for the Generation from UML/MARTE Models of IP-XACT HW Platform Descriptions for Multi-Level Performance Estimation, Proceedings of the Forum of Design and Specification Languages, 2011.

M. Object and . Group, UML profile for System on a Chip, version 1.0. Available: http://www.omg.org/spec

S. Graf, I. Ober, and I. Ober, A real-time profile for UML, International Journal on Software Tools for Technology Transfer, vol.42, issue.3, pp.113-127, 2006.
DOI : 10.1007/s10009-005-0213-x

A. Mrabti, F. Pétrot, and A. Bouchhima, Extending IP-XACT to support an MDE based approach for SoC design, 2009 Design, Automation & Test in Europe Conference & Exhibition, pp.586-589, 2009.
DOI : 10.1109/DATE.2009.5090733

URL : https://hal.archives-ouvertes.fr/hal-00416580

M. Ammar, M. Baklouti, M. Pelcat, K. Desnos, and M. Abid, MARTE to ?SDF transformation for data-intensive applications analysis, Conference on Design & Architectures for Signal & Image Processing, DASIP, 2014.

M. Pelcat, P. Menuet, S. Aridhi, and J. F. Nezan, Scalable compile-time scheduler for multicore architectures, Proceedings of the Conference on Design, Automation and Test in Europe, DATE'09, pp.1552-1555, 2009.
URL : https://hal.archives-ouvertes.fr/hal-00429393

P. Guduric, A. Puder, and R. Todtenhofer, A Comparison between Relational and Operational QVT Mappings, 2009 Sixth International Conference on Information Technology: New Generations, pp.266-271, 2009.
DOI : 10.1109/ITNG.2009.156