M. K. Kazimierczuk, Pulse-width modulated DC-DC power converters, 2008.
DOI : 10.1002/9781119009597

J. Rabaey, F. De-bernardinis, A. Niknejad, B. Nikolic, and A. Sangiovanni-vincentelli, Embedding Mixed-Signal Design in Systems-on-Chip, Proceedings of the IEEE, vol.94, issue.6, pp.1070-1088, 2006.
DOI : 10.1109/JPROC.2006.873609

T. Levi, N. Lewis, J. Tomas, and P. Fouillat, IP-based methodology for analog design flow: Application on neuromorphic engineering, 2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference, pp.343-346, 2008.
DOI : 10.1109/NEWCAS.2008.4606391

URL : https://hal.archives-ouvertes.fr/hal-00514205

R. Iskander, M. Louërat, and A. Kaiser, Hierarchical sizing and biasing of analog firm intellectual properties, Integration, the VLSI Journal, vol.46, issue.2, pp.172-188, 2013.
DOI : 10.1016/j.vlsi.2012.01.001

URL : https://hal.archives-ouvertes.fr/hal-01295050

F. Javid, R. Iskander, M. Louërat, and D. Dupuis, Analog circuits sizing using bipartite graphs, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), pp.1-4, 2011.
DOI : 10.1109/MWSCAS.2011.6026591

URL : https://hal.archives-ouvertes.fr/hal-01286024

F. Javid, S. Youssef, R. Iskander, and M. Louërat, A designerassisted analog synthesis flow, Analog/RF and Mixed-Signal Circuit Systematic Design, pp.123-148, 2013.
URL : https://hal.archives-ouvertes.fr/hal-01219791

W. Liu, MOSFET Models for SPICE Simulation including BSIM3v3 and BSIM4, 2001.
DOI : 10.1109/9780470547182

C. Enz, F. Krummenacher, E. A. Vittoz, G. Gildenblat, X. Li et al., An Analytical MOS Transistor Model Valid in all Region of Operation and Dedicated to Low-Voltage and Low-Current Applications Analog Integrated Circuits and Signal Processing PSP: An advanced surface potential-based MOSFET model for circuit simulation, IEEE Trans. Electron Devices, vol.8, issue.53 9, pp.1979-1993, 2006.

F. Silveira, D. Flandre, and P. G. Jespers, A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA, IEEE Journal of Solid-State Circuits, vol.31, issue.9, pp.1314-1319, 1996.
DOI : 10.1109/4.535416

T. Massier, H. Graeb, and U. Schlichtmann, The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.27, issue.12, pp.2209-2222, 2008.
DOI : 10.1109/TCAD.2008.2006143