High Precision Fault Injections on the Instruction Cache of ARMv7-M Architectures

Abstract : Hardware and software of secured embedded systems are prone to physical attacks. In particular, fault injection attacks revealed vulnerabilities on the data and the control flow allowing an attacker to break cryptographic or secured algorithms implementations. While many research studies concentrated on successful attacks on the data flow, only a few targets the instruction flow. In this paper, we focus on electromagnetic fault injection (EMFI) on the control flow, especially on the instruction cache. We target the very widespread (smartphones, tablets, settop-boxes, health-industry monitors and sensors, etc.) ARMv7-M architecture. We describe a practical EMFI platform and present a methodology providing high control level and high reproducibility over fault injections. Indeed, we observe that a precise fault model occurs in up to 96% of the cases. We then characterize and exhibit this practical fault model on the cache that is not yet considered in the literature. We comprehensively describe its effects and show how it can be used to reproduce well known fault attacks. Finally, we describe how it can benefits attackers to mount new powerful attacks or simplify existing ones.
Type de document :
Communication dans un congrès
HOST 2015: IEEE International Symposium on Hardware-Oriented Security and Trust, May 2015, Washington, United States. HOST 2015: IEEE International Symposium on Hardware-Oriented Security and Trust, 〈10.1109/HST.2015.7140238〉
Liste complète des métadonnées

https://hal.archives-ouvertes.fr/hal-01208378
Contributeur : Pablo Rauzy <>
Soumis le : mardi 6 octobre 2015 - 13:26:31
Dernière modification le : mercredi 7 octobre 2015 - 01:03:47
Document(s) archivé(s) le : jeudi 7 janvier 2016 - 10:14:08

Fichiers

article.pdf
Fichiers produits par l'(les) auteur(s)

Identifiants

Collections

Citation

Lionel Rivière, Zakaria Najm, Pablo Rauzy, Jean-Luc Danger, Julien Bringer, et al.. High Precision Fault Injections on the Instruction Cache of ARMv7-M Architectures. HOST 2015: IEEE International Symposium on Hardware-Oriented Security and Trust, May 2015, Washington, United States. HOST 2015: IEEE International Symposium on Hardware-Oriented Security and Trust, 〈10.1109/HST.2015.7140238〉. 〈hal-01208378〉

Partager

Métriques

Consultations de la notice

299

Téléchargements de fichiers

111