Un réseau sur puce RF reconfigurable dynamiquement pour les many-cœurs

Alexandre Brière 1 Julien Denoulet 1 Andrea Pinna 1 Bertrand Granado 1 François Pecheux 2
1 SYEL - Systèmes Electroniques
LIP6 - Laboratoire d'Informatique de Paris 6
2 CIAN - Circuits Intégrés Numériques et Analogiques
LIP6 - Laboratoire d'Informatique de Paris 6
Abstract : The growing number of cores in a single chip goes along with an increase in communications. The variety of applications runing on the chip causes spatial and temporal heterogeneity of communications. To address these issues, we present in this paper a dynamically reconfigurable interconnect based on Radio Frequency (RF) for intra chip communications. The use of RF allows to increase the bandwidth while minimizing the latency. Dynamic reconfiguration of the interconnect allows to handle the heterogeneity of communications. We present the rationale for choosing RF over optics and 3D, the detailed architecture of the network and the chip implementing it, the evaluation of its feasibility and its performances. One advantage of this RF interconnect is the ability to broadcast without additional cost compared to point-topoint communications, opening new perspectives in terms of cache coherence.
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Journal articles
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https://hal.archives-ouvertes.fr/hal-01202545
Contributor : Alexandre Brière <>
Submitted on : Monday, September 21, 2015 - 12:16:48 PM
Last modification on : Thursday, March 21, 2019 - 2:43:33 PM

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Alexandre Brière, Julien Denoulet, Andrea Pinna, Bertrand Granado, François Pecheux. Un réseau sur puce RF reconfigurable dynamiquement pour les many-cœurs. Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, Lavoisier, 2015, PARALLÉLISME ARCHITECTURE ET SYSTÈMES - PANORAMA DE LA RECHERCHE FRANCOPHONE, 34/1-2, pp.11-29. ⟨http://tsi.revuesonline.com/article.jsp?articleId=21214⟩. ⟨10.3166/tsi.34.11-29⟩. ⟨hal-01202545⟩

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