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Exploration of Heterogeneous FPGA Arcrchitectures

Abstract : Mesh-based heterogeneous FPGAs are commonly used in industry and academia due to their area, speed, and power benefits over their homogeneous counterparts. These FPGAs contain a mixture of logic blocks and hard blocks where hard blocks are arranged in fixed columns as they offer an easy and compact layout. However, the placement of hard-blocks in fixed columns can potentially lead to underutilization of logic and routing resources and this problem is further aggravated with increase in the types of hard-blocks. This work explores and compares different floor-planning techniques of mesh-based FPGA to determine their effect on the area, performance, and power of the architecture. A tree-based architecture is also presented; unlike mesh-based architecture, the floor-planning of heterogeneous tree-based architecture does not affect its routing requirements due to its hierarchical structure. Both mesh and tree-based architectures are evaluated for three sets of benchmark circuits. Experimental results show that a more flexible floor-planning in mesh-based FPGA gives better results as compared to the column-based floor-planning. Also it is shown that compared to different floor-plannings of mesh-based FPGA, tree-based architecture gives better area, performance, and power results.
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Submitted on : Friday, September 11, 2015 - 1:52:43 PM
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Umer Farooq, Husain Parvez, Habib Mehrez, Zied Marrakchi. Exploration of Heterogeneous FPGA Arcrchitectures. International Journal of Reconfigurable Computing, Hindawi Publishing Corporation, 2011, 2011, pp.121404. ⟨10.1155/2011/121404⟩. ⟨hal-01197276⟩



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