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Article Dans Une Revue IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Année : 2005

VHDL-AMS and Verilog-AMS as alternative hardware description languages for efficient modeling of multidiscipline systems

Christophe Lallement
  • Fonction : Auteur
Alain Vachoux
  • Fonction : Auteur

Résumé

This paper focuses on commonalities and differences between the two mixed-signal hardware description languages, VHDL-AMS and Verilog-AMS, in the case of modeling heterogeneous or multidiscipline systems. The paper has two objectives. The first one is modeling the structure and the behavior of an airbag system using both the VHDL-AMS and the Verilog-AMS languages. Such a system encompasses several time abstractions (i.e., discrete-time and continuous-time), several disciplines, or energy domains (i.e., electrical, thermal, optical, mechanical, and chemical), and several continuous-time description formalisms (i.e., conservative-law and signal-flow descriptions). The second objective is to discuss the results of the proposed modeling process in terms of the descriptive capabilities of the VHDL-AMS and Verilog-AMS languages and of the generated simulation results. The tools used are the Advance-MS from Mentor Graphics for VHDL-AMS and the AMS Simulator from Cadence Design Systems for Verilog-AMS. This paper shows that both languages offer effective means to describe and simulate multidiscipline systems, though using different descriptive approaches. It also highlights current tool limitations, since full language definitions are not yet supported.

Dates et versions

hal-01195872 , version 1 (08-09-2015)

Identifiants

Citer

François Pêcheux, Christophe Lallement, Alain Vachoux. VHDL-AMS and Verilog-AMS as alternative hardware description languages for efficient modeling of multidiscipline systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2005, 24 (2), pp.204-225. ⟨10.1109/TCAD.2004.841071⟩. ⟨hal-01195872⟩
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