Hardware Implementation of a configurable Motion Estimator for Adjusting the Video Coding Performances

Abstract : Despite the diversity of video compression standard, the motion estimation still remains a key process which is used in most of them. Moreover, the required coding performances (bit-rate, PSNR, image spatial resolution, etc.) depend obviously of the application, the environment and the network communication. The motion estimation can therefore be adapted to fit with these performances. Meanwhile, the real time encoding is required in many applications. In order to reach this goal, we propose in this paper a hardware implementation of the motion estimator which enables the integer motion search algorithms to be modified and the fractional search and variable block size to be selected and adjusted. Hence this novel architecture, especially designed for FPGA targets, proposes high-speed processing for a configuration which supports the variable size blocks and quaterpel refinement, as described in H.264.
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Contributor : Julien Dubois <>
Submitted on : Wednesday, June 17, 2015 - 9:16:47 AM
Last modification on : Tuesday, April 2, 2019 - 2:39:58 AM

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Wajdi Elhamzi, Julien Dubois, Johel Miteran, Mohamed Atri, Rached Tourki. Hardware Implementation of a configurable Motion Estimator for Adjusting the Video Coding Performances. Lecture Notes in Computer Science, Springer, 2012, Advanced Concepts for Intelligent Vision Systems, 7517, pp.96-107. ⟨hal-01164476⟩

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