Data-aware Process Networks

Christophe Alias (1) , Alexandru Plesco (1)

1 COMPSYS - Compilation and embedded computing systems

This report presents the Data-aware Process Networks, a new parallel execution model adapted to the hardware constraints of high-level synthesis, where the data transferts are made explicit. We show that the DPN model is consistant in the meaning where any translation of a sequential program produces an equivalent DPN without deadlocks. Finally, we show how to compile a sequential program to a DPN and how to optimize the input/output and the parallelism.

Mots clés: automatic parallelization; High-level Synthesis; polyhedral compilation; I/O optimization

Domaines: Systèmes embarqués; Architectures Matérielles [cs.AR]; Calcul parallèle, distribué et partagé [cs.DC]; Technologies Émergeantes [cs.ET]; Langage de programmation [cs.PL]

Christophe Alias, Alexandru Plesco. Data-aware Process Networks. [Rapport de recherche] RR-8735, Inria - Research Centre Grenoble – Rhône-Alpes; INRIA. 2015, pp.32. ⟨hal-01158726⟩