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Poster communications

A hierarchical RF interconnect for MPSoC

Alexandre Brière 1, * Julien Denoulet 1 Andrea Pinna 1 Bertrand Granado 1 François Pecheux 2
* Corresponding author
1 SYEL - Systèmes Electroniques
LIP6 - Laboratoire d'Informatique de Paris 6
2 CIAN - Circuits Intégrés Numériques et Analogiques
LIP6 - Laboratoire d'Informatique de Paris 6
Abstract : The increasing number of cores in a single chip goes along with the increase of communication needs. To address this issue, we propose a Network on Chip (NoC) using Radio Frequency (RF). We present the detailed architecture of this network and a Multi Processor System on Chip (MPSoC) using it.
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Contributor : Alexandre Brière Connect in order to contact the contributor
Submitted on : Friday, April 24, 2015 - 11:45:25 AM
Last modification on : Tuesday, January 12, 2021 - 9:38:02 AM


  • HAL Id : hal-01145448, version 1


Alexandre Brière, Julien Denoulet, Andrea Pinna, Bertrand Granado, François Pecheux. A hierarchical RF interconnect for MPSoC. 9ème colloque du GDR SOC-SIP du CNRS, Jun 2014, Paris, France. 2014. ⟨hal-01145448⟩



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