Reactive Embedded Device Driver Synthesis using Logical Timed Models

Julien Tanguy 1, * Jean-Luc Béchennec 1 Mikaël Briday 1 Olivier-H Roux 1
* Corresponding author
1 Systèmes Temps Réel
IRCCyN - Institut de Recherche en Communications et en Cybernétique de Nantes
Abstract : The critical nature of hard real-time embedded systems leads to an increased usage of Model Based Design to generate a correct-by-construction code from a formal specification. If Model Based Design is widely used at application level, most of the low level code, like the device drivers, remains written by hand. Timed Automata are an appropriate formalism to model real time embedded systems but are not easy to use in practice for two reasons i) both hardware and software timings are difficult to obtain, ii) a complex infrastructure is needed for their implementation. This paper introduces an extension of untimed automata with logical time. The new semantics introduces two new types of actions: delayed action which are possibly avoidable, and ineluctable action which will happen eventually. The controller synthesis problem is adapted to this new semantics. This paper focuses specifically on the reachability problem and gives an algorithm to generate a controller.
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Julien Tanguy, Jean-Luc Béchennec, Mikaël Briday, Olivier-H Roux. Reactive Embedded Device Driver Synthesis using Logical Timed Models. 4th International Conference on Simulation and Modeling Methodologies, Technologies and Applications (SIMULTECH 2014), Aug 2014, Vienne, Austria. ⟨10.5220/0005040101630169⟩. ⟨hal-01142411⟩



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