R. T. Kouzes, G. A. Anderson, S. T. Elbert, I. Gorton, and D. K. Gracio, The Changing Paradigm of Data-Intensive Computing, IEEE Computer, pp.26-34, 2009.
DOI : 10.1109/MC.2009.26

D. Lugato, J. Bruel, and I. Ober, Model-Driven Engineering for High Performance Computing Applications Modeling Simulation and Optimization-Focus on Applications, 2010.

M. Object and . Group, UML Profile for MARTE: Modeling and Analysis of Real-Time Embedded Systems, version 1.0. Available: http://www.omg.org/spec

E. A. Lee and D. G. Messerschmitt, Synchronous data flow, Proceedings of the IEEE, pp.1235-1245, 1987.
DOI : 10.1109/PROC.1987.13876

K. Desnos, M. Pelcat, J. Nezan, S. Bhattacharyya, and S. Aridh, PiMM: Parameterized and Interfaced dataflow Meta-Model for MPSoCs runtime reconfiguration, 2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2013.
DOI : 10.1109/SAMOS.2013.6621104

URL : https://hal.archives-ouvertes.fr/hal-00877492

M. Pelcat, Rapid Prototyping and Dataflow-Based Code Generation for the 3GPP LTE eNodeB Physical Layer mapped onto Multi-Core DSPs, 2010.
URL : https://hal.archives-ouvertes.fr/tel-00578043

M. Object and . Group, Unified Modeling Language specification, version 2.1. Available: http://www.omg.org/spec

E. A. Lee and T. M. Parks, Datafow process networks, Proceedings of the IEEE, p.773799, 1995.

G. Bilsen, M. Engels, R. Lauwereins, and J. Peperstraete, Cyclostatic dataflow, IEEE Transactions on Signal Processing, vol.44, issue.2, p.397408, 1996.

P. Murthy and E. Lee, Multidimensional synchronous dataflow Parameterized dataflow modeling for DSP systems, IEEE Transactions on Signal Processing IEEE Transactions on Signal Processing, vol.50, issue.8, p.20642079, 2001.

J. Piat, S. Bhattacharyya, and M. Raulet, Interface-based hierarchy for synchronous data-flow graphs, 2009 IEEE Workshop on Signal Processing Systems, 2009.
DOI : 10.1109/SIPS.2009.5336240

URL : https://hal.archives-ouvertes.fr/hal-00440478

A. Ghamarian, M. C. Geilen, S. Stuijk, T. Basten, A. J. Moonen et al., Throughput Analysis of Synchronous Data Flow Graphs, Sixth International Conference on Application of Concurrency to System Design, pp.25-36, 2006.

S. Stuijk, M. Geilen, and T. Basten, Throughput-Buffering Trade-Off Exploration for Cyclo-Static and Synchronous Dataflow Graphs, IEEE Transactions on Computers, vol.57, issue.10, pp.1331-1345, 2008.
DOI : 10.1109/TC.2008.58

Y. Yang, M. Geilen, T. Basten, S. Stuijk, and H. , Exploring trade-offs between performance and resource requirements for synchronous dataflow graphs, 2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia, pp.96-105, 2009.
DOI : 10.1109/ESTMED.2009.5336821

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.160.652

K. Desnos, M. Pelcat, J. Nezan, and S. Aridhi, Memory bounds for the distributed execution of a hierarchical Synchronous Data-Flow graph, 2012 International Conference on Embedded Computer Systems (SAMOS), pp.160-167, 2012.
DOI : 10.1109/SAMOS.2012.6404170

URL : https://hal.archives-ouvertes.fr/hal-00721335

J. T. Buck, S. Ha, E. A. Lee, and D. G. Messerschmitt, Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems, International Journal of Computer Simulation, special issue on Simulation Software Development, vol.4, pp.155-182, 1994.
DOI : 10.1016/B978-155860702-6/50048-X

M. Pelcat, J. Piat, M. Wipliez, S. Aridhi, and J. Nezan, An Open Framework for Rapid Prototyping of Signal Processing Applications, EURASIP Journal on Embedded Systems, vol.75, issue.9
DOI : 10.1109/78.295199

URL : https://hal.archives-ouvertes.fr/hal-00429312

S. Stuijk, Predictable mapping of streaming applications on multiprocessors, 2007.

S. Stuijk, M. Geilen, B. Theelen, and T. Basten, Scenario-aware dataflow: Modeling, analysis and implementation of dynamic applications, 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, pp.404-411, 2011.
DOI : 10.1109/SAMOS.2011.6045491

F. A. Do-nascimento, M. F. Oliveira, and F. R. Wagner, A model-driven engineering framework for embedded systems design, Innovations in Systems and Software Engineering, pp.19-33, 2012.
DOI : 10.1007/s11334-011-0175-y

T. Kangas, P. Kukkala, H. Orsila, E. Salminen, M. Hännikäinen et al., UML-based multiprocessor SoC design framework, ACM Transactions on Embedded Computing Systems, vol.5, issue.2, pp.281-320, 2006.
DOI : 10.1145/1151074.1151077

K. Grüttner, P. A. Hartmann, K. Hylla, S. Rosinger, W. Nebel et al., The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration, Microprocessors and Microsystems, vol.37, issue.8, pp.966-980, 2013.
DOI : 10.1016/j.micpro.2013.09.001

I. Quadri, E. Brosse, I. Gray, N. Matragkas, L. S. Indrusiak et al., MADES FP7 EU project: Effective high level SysML/MARTE methodology for real-time and embedded avionics systems, 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), pp.1-8, 2012.
DOI : 10.1109/ReCoSoC.2012.6322882

P. Guduric, A. Puder, and R. Todtenhofer, A Comparison between Relational and Operational QVT Mappings, 2009 Sixth International Conference on Information Technology: New Generations, pp.266-271, 2009.
DOI : 10.1109/ITNG.2009.156

M. Pelcat, J. Nezan, J. Piat, J. Croizer, and S. Aridhi, A System-Level Architecture Model for Rapid Prototyping of Heterogeneous Multicore Embedded Systems, 2009.
URL : https://hal.archives-ouvertes.fr/hal-00429397

I. Sobel-freeman and H. , An Isotropic 33 Gradient Operator, Machine Vision for ThreeDimensional Scenes, pp.376-379, 1990.