Adaptive Data Prefetching for High Performance Processors
Résumé
Nowadays, one of the main limiting factor in processor
development is the increasing speed gap between efficient processing
elements and slow main memories. To reduce this limitation, prefetching
mechanisms, implemented in memory hierarchy, attempt to predict the
future data needed in local memory. However, classical proposed
solutions are designed for specific access sequences but lack of
efficiency considering irregular and heterogeneous access patterns.
Adaptive data prefetching aims to tackle the limitation of existing
prefetch solution by self-reconfiguring its parameters according to the
dynamic variations in the current access sequence. We propose to use a
modeling of the main existing access patterns and an on-line monitoring
of the access sequence to detect and trigger the data prefetching.